Achronix announced Bridge100, a 120 Gbps Infiniband-to-Ethernet programmable platform that provides an array of 1.5 GHz Achronix SPD60 FPGAs, 8 GB of additional on-board memory (upgradeable to 32GB), and two 120 Gbps communication ports.
The Achronix Bridge100 platform offers two 120 Gbps bidirectional interfaces: three QSFP connectors on one side, and 12 XFP connectors on the other. All Speedster FPGA features are available, including logic, RAMs, multipliers, SerDes, programmable I/Os and the Achronix patented picoPIPE acceleration technology. The programmable logic takes the form of an array of SPD60s from the Achronix Speedster family of FPGAs —logic devices with up to 1.5GHz in fabric performance.
The high datapath bandwidth of each SPD60 (10.3 Gbps SerDes) provides enough bandwidth to support two 100 Gbps interfaces (Ethernet, Infiniband). Additional SerDes lanes are used in 60 Gbps chip-to-chip links, effectively fusing the SPD60s into one “megachip.” Each SPD60 provides up to 273 Gbps of raw DDR3 memory bandwidth.
The Bridge100 comes loaded with eight DDR3 modules, a QDRII+ memory, and a NetLogic Search Engine (CAM). This memory is in addition to the 3.3 Mb per SPD60 (30 Mb total) embedded in the FPGA devices. These memory resources are available for packet buffering, classification, scheduling and traffic shaping, and statistics gathering.