The innovative ParagonX software platform and methodology delivers actionable insights to help IQ-Analog engineers quickly and easily pinpoint bottlenecks and root causes of IC design challenges caused by layout parasitics. This enables IQ-Analog to more efficiently improve the performance, power efficiency, robustness and reliability of their IC designs in modern FinFET technologies.
Emerging 5G systems can support more than 10 times greater bandwidth per antenna and require more than 10 times the number of antenna elements over prior LTE systems, resulting in the need for 100 times higher data conversion and processing. IQ-Analog is addressing this market requirement with its novel Traveling Pulse Wave Quantization (TPWQ) technology that enables time-domain digital processing of analog signals directly at the antenna. This flexibility offers 50 times lower cost and four times lower power consumption than commercially available systems, ushering in a new era of software defined radio platforms for next-generation 5G communications.
“As we migrate our designs to advanced FinFET technologies, IC layout parasitics have become the dominant source of performance and reliability bottlenecks, as well as delays in our development cycle,” said Michael Kappes, CEO of IQ-Analog. “Diakopto’s ParagonX is a godsend to help us navigate and overcome these challenges. It is extremely fast and easy to use, and provides very intuitive results and deep insights to parasitics-induced problems to drive improvements and optimizations in our designs.”
Parasitics are unintended elements in IC designs that degrade circuit performance, precision, power efficiency, robustness, and reliability. The ever-increasing need for higher density, faster speed, and greater precision of integrated circuits, coupled with continued migration to more advanced technology nodes have redefined the role of parasitics in IC design. The power-performance-area (PPA) metric and time-to-market of modern ICs are now dominated by on-chip interconnects and layout parasitics. Debugging the root causes of IC design problems has become extraordinarily difficult, tedious, and time-consuming.
ParagonX offers a new methodology that treats parasitics as a first-order design parameter. It is orders of magnitude faster than other EDA solutions, and helps engineers quickly find the few critical parasitic elements (out of thousands, millions, or billions) that are responsible for bottlenecks, choke points and weak areas. This reduces parasitics-related IC debugging and optimization time from days or weeks to minutes or hours, which is especially valuable during the tapeout phase.
“We are pleased to have IQ-Analog select ParagonX for their innovative 5G wideband transceiver designs,” commented Maxim Ershov, CEO and CTO of Diakopto. “This speaks to the versatility of our ParagonX platform as it has been adopted for a broad spectrum of applications, including high-speed SerDes, 5G wireless, optical communications, image sensors, low-power IoT, memories, and many others.”
A unique feature of the ParagonX software is its unparalleled ease-of-use. It offers a unique out-of-the-box experience that enables novice users to get started with minimal training. The tool does not require any complicated setup, configuration, CAD support, or foundry qualification. This highly intuitive and versatile methodology enables rapid adoption by new users and design teams.